Binary data may be transmitted using a number of modulation schemes such as amplitude-shift keying (ASK) or phase-shift keying (PSK). In PSK modulation, a carrier signal such as cos(wt) is used to represent one binary state (either zero or one) and a phase-shifted carrier signal (such as −cos(wt)) is used to represent the remaining binary state. A PSK signal cannot be incoherently demodulated because the envelope for a sinusoid is not affected by the phase shift used to represent data. Thus, a receiver for PSK-modulated signals needs to generate a carrier that is synchronous with the received carrier so that the phase changes may be detected. A number of techniques may be used to generate the carrier signal such as through squaring the received signal. However, the resulting recovered carrier has a phase ambiguity with regard to the received signal. Because of this ambiguity, what was a logical one may be decoded as a logical zero and vice-versa. Thus, such receivers may be vulnerable to substantial errors resulting from a polarity reversal of the received data.
A differential encoding scheme protects against this polarity reversal for a received PSK signal. For example, suppose a baseband digital word is 11100100. One form of differential encoding for this word would be to encode a logical one the same as the encoding given the preceding bit and to encode a zero by the opposite of the encoding for the preceding bit. Because the initial bit has no preceding bit, the encoder will need a starting value, which may be either one or zero. If we assume the starting value is one, the baseband word 11100100 becomes 11101101. Because the transition between adjacent bits is being encoded, a PSK modulation scheme becomes immune to the phase ambiguity in the recovered carrier signal. Thus, differential encoding schemes are immune to the polarity reversal problem discussed above. It may be observed that in a PSK-modulated signal where a given bit is transmitted as +/−1 times a carrier signal, the preceding bit may be considered as a carrier with a possible phase ambiguity of 180 degrees. This fact has been exploited in differential PSK (DPSK). In a DPSK receiver, the received signal is multiplied with a version of the received signal delayed by a bit period. The product of this multiplication may then be low-pass filtered. Given the preceding differential encoding scheme (in which a one is encoded the same as the preceding bit whereas a zero is encoded oppositely to that used for the preceding bit), the output of the low-pass filtering will be positive if a logical one is received and negative if a logical zero is received. The robust performance yet simple implementation for differential encoding schemes such as DPSK has lead to its widespread use.
Differential encoding may be used in high-speed digital communication links such as 10 gigabit Ethernet links. A transmission speed of 10 Giga-bits per second is too fast for conventional copper-based links such that it is conventional to use an optical fiber in 10 gigabit Ethernet links. However, the photonic signals in the optical fiber must be converted back into electrical impulses so that the information may be decoded. Because copper-based links cannot typically accommodate a 10 gigabit signal, the photonic signal may be demultiplexed into four 3.125 Giga-bit links such as practiced in the XAUI protocol. Thus, it is common to multiplex a plurality of relatively low-speed input signals into a single high-speed serial signal. A generic multiplexed transmission system with differential encoding is illustrated in FIG. 1. Four input data streams X1 through X4 are multiplexed in a 4:1 multiplexer 100 to form a serial data multiplexed data stream Y. Data stream Y is differentially encoded using, for example, an XOR gate 105 and a one-bit-period (T) delay circuit 110 to form an encoded data stream YENCODED. Encoded data stream YENCODED transmits across a serial data link (which may be a wireless link or may comprise a transmission line such as a fiber optic link) to be decoded using, for example, another one-bit-period (T) delay circuit 115 and another XOR gate 120 to retrieve data stream Y. Data stream Y is then demultiplexed in a 4:1 demultiplexer 125 so that four output data streams X1 through X4 may be produced. Because of noise or other interferences, a bit in one of the input data streams X1 through X4 may be corrupted before multiplexing in multiplexer 100. This corrupted bit will then produce an error in an adjacent bit in the encoded data stream YENCODED because of the differential encoding. The encoded data stream YENCODED will thus have two corrupted bits due to the single bit error. When demultiplexed, each of the adjacent bit errors will be placed in its own output word. For example, one error might be in the X1 output data stream whereas the formerly-adjacent bit error is then placed in the X2 output data stream. Thus, a single erroneous word carried in an input data stream becomes two erroneous words in the output data streams.
Accordingly, there is a need in the art for multiplexed differentially encoded data transmission having a lower bit error rate.